Lesson 9.1 – Semiconductors & p–n Junctions (35 Prompts)

Foundation (1–10)

1. Define semiconductor.

2. Distinguish intrinsic and extrinsic semiconductors.

3. Define doping.

4. Give example of a semiconductor material.

5. State what a p‑type semiconductor is.

6. State what an n‑type semiconductor is.

7. Define majority carriers.

8. Define minority carriers.

9. Define p–n junction.

10. Draw simple p–n junction diagram.

Intermediate (11–23)

11. Explain formation of depletion region.

12. Describe barrier potential.

13. Compare p‑type and n‑type materials.

14. Sketch energy band diagram of p–n junction.

15. Explain forward biasing.

16. Explain reverse biasing.

17. Describe diode behaviour in forward bias.

18. Describe diode behaviour in reverse bias.

19. Explain effect of temperature on semiconductor.

20. Sketch I–V characteristics of diode.

21. Describe breakdown concept qualitatively.

22. Compare Zener and avalanche breakdown.

23. Explain significance of minority carrier injection.

Advanced (24–35)

24. Derive diode equation qualitatively.

25. Analyse effect of doping concentration.

26. Explain diffusion and drift currents.

27. Model depletion width variation.

28. Explain reverse saturation current.

29. Derive built‑in potential conceptually.

30. Compare semiconductor vs metal conduction.

31. Solve multi‑junction charge distribution (conceptual).

32. Analyse band bending.

33. Evaluate diode temperature sensitivity.

34. Compare p–n junction with Schottky diode.

35. Apply semiconductor concepts to solar cells.

Lesson 9.2 – Diodes & Rectification (35 Prompts)

Foundation (1–10)

1. Define a diode.

2. Draw diode symbol.

3. State forward voltage drop.

4. Define rectification.

5. Identify half‑wave rectifier.

6. Identify full‑wave rectifier.

7. Define ripple.

8. Identify role of filter capacitor.

9. Explain PIV.

10. Draw simple rectifier circuit.

Intermediate (11–23)

11. Explain working of half‑wave rectifier.

12. Explain working of bridge rectifier.

13. Compare efficiency of half‑wave and full‑wave.

14. Sketch rectified waveform.

15. Describe behaviour of capacitor filter.

16. Calculate average DC output.

17. Explain ripple reduction.

18. Analyse rectifier load regulation.

19. Solve simple rectifier numerical.

20. Sketch output waveform with capacitor.

21. Compare filtered vs unfiltered output.

22. Explain diode role in AC‑to‑DC conversion.

23. Evaluate diode performance at high frequency.

Advanced (24–35)

24. Analyse ripple mathematically.

25. Derive DC output of full‑wave rectifier.

26. Solve R–C filter rectifier problem.

27. Model diode switching behaviour.

28. Analyse PIV rating selection.

29. Evaluate rectifier efficiency.

30. Solve multi‑stage rectifier circuit.

31. Discuss rectification in SMPS.

32. Compare silicon and germanium diodes.

33. Analyse rectifier under non‑ideal diode.

34. Solve rectifier transient behaviour conceptually.

35. Apply rectification to power supply design.

Lesson 9.3 – Zener Diodes & Regulation (35 Prompts)

Foundation (1–10)

1. Define Zener diode.

2. State breakdown voltage.

3. Draw Zener symbol.

4. Define voltage regulation.

5. Identify Zener in regulation circuit.

6. Explain reverse breakdown.

7. Distinguish Zener vs normal diode.

8. State typical Zener voltage range.

9. Define load regulation.

10. Define line regulation.

Intermediate (11–23)

11. Explain how Zener regulates voltage.

12. Sketch Zener characteristic curve.

13. Draw Zener regulator circuit.

14. Calculate output voltage of Zener regulator.

15. Determine series resistor for regulation.

16. Analyse regulation with load changes.

17. Determine Zener current range.

18. Evaluate Zener power dissipation.

19. Explain ripple effects on Zener.

20. Solve multi‑step Zener circuit.

21. Compare Zener and avalanche diodes.

22. Explain Zener clamping.

23. Analyse effect of temperature on Zener.

Advanced (24–35)

24. Derive Zener regulation equation.

25. Solve Zener regulator with variable load.

26. Analyse Zener efficiency.

27. Solve maximum load current problem.

28. Model Zener dynamic resistance.

29. Evaluate series vs shunt regulation.

30. Compare Zener regulator with IC regulators.

31. Analyse multi‑Zener reference circuit.

32. Evaluate Zener drift.

33. Analyse precision reference applications.

34. Solve protection circuit using Zener.

35. Predict failure modes of Zener circuits.

Lesson 9.4 – Bipolar Junction Transistors (BJT) (35 Prompts)

Foundation (1–10)

1. Define transistor.

2. Draw npn and pnp symbols.

3. Define β.

4. Identify emitter, base, collector.

5. State transistor configurations.

6. Define active region.

7. Define saturation.

8. Define cutoff.

9. Identify current directions.

10. Define collector current.

Intermediate (11–23)

11. Explain CE configuration.

12. Sketch input/output characteristics.

13. Calculate IC from β and IB.

14. Draw load line.

15. Analyse transistor as a switch.

16. Solve biasing resistor problem.

17. Compare CE, CB, CC.

18. Determine Q‑point.

19. Explain thermal runaway.

20. Solve multi‑step β calculation.

21. Analyse transistor amplification qualitatively.

22. Interpret characteristic curves.

23. Evaluate transistor stability.

Advanced (24–35)

24. Solve transistor biasing network.

25. Derive transistor equations qualitatively.

26. Model AC amplification.

27. Analyse small‑signal model (conceptual).

28. Evaluate stability factor S.

29. Solve transistor switching time.

30. Compare BJT with MOSFET.

31. Analyse transistor in saturation.

32. Model β variation with temperature.

33. Solve amplifier gain problem.

34. Evaluate transistor distortion.

35. Apply BJT models to circuit design.

Lesson 9.5 – Field Effect Transistors (FET/JFET/MOSFET) (35 Prompts)

Foundation (1–10)

1. Define FET.

2. Draw JFET symbol.

3. Define gate, drain, source.

4. Identify n‑channel vs p‑channel.

5. Define pinch‑off voltage.

6. State difference between FET and BJT.

7. Define input impedance.

8. Identify depletion region.

9. Draw MOSFET symbol.

10. Define threshold voltage.

Intermediate (11–23)

11. Sketch JFET output characteristics.

12. Explain why gate is reverse biased.

13. Describe drain current control.

14. Compare enhancement and depletion MOSFET.

15. Analyse transconductance.

16. Solve simple FET bias problem.

17. Sketch transfer characteristics.

18. Calculate ID using transfer equation (conceptual).

19. Compare MOSFET and JFET performance.

20. Explain channel modulation.

21. Solve FET DC bias network.

22. Analyse on‑state and off‑state.

23. Discuss FET advantages in amplification.

Advanced (24–35)

24. Model MOSFET I–V behaviour qualitatively.

25. Derive transconductance for JFET.

26. Solve multi‑step biasing of MOSFET.

27. Analyse small‑signal FET model (conceptual).

28. Compare MOSFET threshold variations.

29. Evaluate MOSFET switching.

30. Solve FET amplifier gain problem.

31. Analyse body effect qualitatively.

32. Model high‑frequency FET behaviour.

33. Solve advanced FET load‑line problem.

34. Evaluate MOSFET scaling issues.

35. Apply FET theory to digital logic design.

Lesson 9.6 – Operational Amplifiers (Op‑Amps) (35 Prompts)

Foundation (1–10)

1. Define op‑amp.

2. Identify inverting and non‑inverting inputs.

3. Define open‑loop gain.

4. Draw op‑amp symbol.

5. State ideal op‑amp rules.

6. Define saturation.

7. Identify virtual ground.

8. State meaning of differential input.

9. Define slew rate.

10. Identify feedback.

Intermediate (11–23)

11. Draw inverting amplifier.

12. Calculate gain of inverting amplifier.

13. Draw non‑inverting amplifier.

14. Calculate non‑inverting gain.

15. Sketch comparator output.

16. Explain voltage follower.

17. Analyse summing amplifier.

18. Solve op‑amp limitation problem.

19. Interpret output waveform for given input.

20. Compare open‑loop and closed‑loop.

21. Sketch input‑output relationship.

22. Solve op‑amp resistor network.

23. Explain offset voltage.

Advanced (24–35)

24. Analyse op‑amp integrator.

25. Analyse op‑amp differentiator.

26. Solve multi‑op‑amp network.

27. Evaluate stability and feedback.

28. Model slew rate limitations.

29. Solve high‑frequency op‑amp issue.

30. Compare ideal vs real op‑amp.

31. Analyse common‑mode rejection.

32. Model op‑amp bandwidth.

33. Solve precision amplification problem.

34. Evaluate op‑amp noise.

35. Apply op‑amps to instrumentation design.

Lesson 9.7 – Logic Gates & Boolean Algebra (35 Prompts)

Foundation (1–10)

1. Define logic gate.

2. Draw AND, OR, NOT symbols.

3. State Boolean expression for AND.

4. State Boolean expression for OR.

5. Define truth table.

6. Identify NAND gate.

7. Identify NOR gate.

8. Define XOR.

9. Identify universal gates.

10. Write truth table for NOT.

Intermediate (11–23)

11. Write truth table for NAND.

12. Write truth table for NOR.

13. Simplify Boolean expression.

14. Convert Boolean to logic circuit.

15. Draw XOR gate truth table.

16. Solve gate combination output.

17. Convert OR using NAND gates.

18. Convert AND using NOR gates.

19. Analyse multi‑input gate.

20. Sketch timing diagram.

21. Use De Morgan’s laws.

22. Simplify digital expressions.

23. Design simple digital circuit.

Advanced (24–35)

24. Implement full adder.

25. Design half adder.

26. Analyse propagation delay.

27. Solve multi‑gate logic network.

28. Design combinational logic system.

29. Optimise Boolean expression.

30. Evaluate hazards and glitches.

31. Analyse multi‑level logic system.

32. Design encoder/decoder conceptually.

33. Model logic circuits with truth tables.

34. Compare CMOS and TTL.

35. Apply Boolean algebra to digital system design.

Lesson 9.8 – Flip‑Flops & Sequential Logic (35 Prompts)

Foundation (1–10)

1. Define flip‑flop.

2. Draw SR latch.

3. Define clock signal.

4. State Q and Q̄.

5. Identify invalid state.

6. Define JK flip‑flop.